ARTICLE - MAY / JUNE 2004

1. Executive Summary on Heterogeneity on silicon or in a package for future system innovation

2. Executive Summary on Development of On-Chip Signal Processing for Audio/Video/User interfaces

1. Executive Summary on Heterogeneity on silicon or in a package for future system innovation

In the coming decade silicon devices will be divided into two main categories :

  1. bit rate performance driven digital ICs, following Moore's law on the ITRS roadmap, for which the US area is dominant,

  2. and mixed signal heterogeneous devices driven by cost and also other requirements such as low energy dissipation and integration of various technologies, where Europe may have a strong leadership. This category of devices follows a more diversified roadmap where the minimal dimension of the transistor is only one of the key parameters of the technology along with mixed-mode or RF components, embedded MEMS and bio-functions.

For this type of system, heterogeneity on silicon or in a package is the main feature for system integration.

Due to the growing importance of heterogeneous systems for the European semiconductor industry, a subcommittee of the MEDEA+ Scientific Committee was formed, with experts from CEA-LETI, Fraunhofer Gesellschaft (FhG) and IMEC. A contribution from industrial experts was added at a later stage.

For the sake of simplicity, the report focuses on silicon technologies, excluding optical devices and systems, as well as flexible electronics (e.g. on plastics). In the same way, harsh environments requiring dedicated technologies are not specifically discussed. It should also be stressed that embedded software is not detailed in the document, though it contributes to a large extent to the final cost of the system.



Many important applications for heterogeneous systems fit in the 'Ambient Intelligence' theme, where integrated systems are defined as smart devices which are conscious of and self-adapting to their environment while communicating with a dynamically reconfigurable network of other devices. Technological challenges include extremely low-leakage CMOS, high quality RF devices (passives, MEMS, etc.) and new packaging solutions. The major design challenge deals with the co-design of programmable and reconfigurable multiprocessor architectures with distributed memories and including embedded software, broadband radios, etc.

For the longer term, completely three-dimensional packaging solutions of chips coming from extremely heterogeneous technologies must be developed as sketched by the "e-grain" or "smart dust" concepts. Here, novel power sources based on thin film batteries, fuel cells, inductive coupling or various MEMS concepts must be considered, as well as sophisticated physical and (bio)chemical interfaces to and from the outside world. The ability to exchange a broad range of complex design parameters between devices from different technologies, packages, and systems in a concurrent co-design targeted towards lower cost will be an extraordinary challenge, needing to close additional technical and cultural gaps through a multidisciplinary approach.

The major technology directions are covered in the document along two broad routes, namely the system design side, with a specific discussion on test, and the system packaging technology, with key focus on the wafer level packaging, the vertical integration and the System-in-a-Package concept, adding a separate discussion on the integrated energy supply.

The report is intended to be neither a roadmap nor a market study, but rather aims at describing various scenarios for the next decade in the field of heterogeneous systems on silicon or in a package including an analysis of the strengths and weaknesses in Europe.

The major findings of the study are listed below :

  • A holistic approach to the design of systems that have a high degree of heterogeneity should be promoted. This requires a new collaborative and multi-disciplinary approach to system level design and technology research driven by well-chosen long term focused application domains. Testing of heterogeneous systems in particular requires R&D efforts.

  • There is a need for advanced research in design methodologies for mixed signal, RF design, ultra-low power multiprocessor architectures.

  • Major breakthroughs are needed in a multi-scale co-design of chip and package in order to optimize the overall size, performance and cost of the system. It includes an efficient partitioning between monolithic parts and the package.

  • Development of advanced technologies for Systems in a Package are mandatory, e.g. to accommodate the reduced mechanical stability and heat conductivity of new interconnects and the introduction of new materials for RF components, higher density and multi-layer technology on flexible substrates.

  • The heterogeneous systems should integrate the power devices and power management in their design flow and fabrication.

2. Executive Summary on Development of On-Chip Signal Processing for Audio/Video/User interfaces

The report identifies several major future trends in the applications of microelectronics for digital signal processing. The task given to the subcommittee of the MEDEA+ Scientific Committee was to report on the "Development of On-Chip Signal Processing for Audio/Video/User Interfaces".

The sub-committee comprised experts from Fraunhofer Gesellschaft, TU Delft, IMEC, INPG-TIMA and IST-Lisbon, with additional contribution by industry experts. In the process of writing the report, the scope was somewhat broadened to include other major developments, in particular application scenarios.

In order to identify major trends and to establish where future progress in IC technology for on-chip signal processing is required, the following procedure was followed :

  • Identify the main trends in applications of very complex signal processing, including both important requirements for future systems and trends in applications.

  • Identify a few "killer applications" which will not just make use of new enabling technologies (including silicon technologies and new algorithms), but will turn up as appliances that will then be sold in the order of many million highly complex devices.

  • Derive research issues from the main trends and killer applications, including very important issues for future systems-on-a-chip.

The task was carried out not as a complete overview of the group's vision of future technology, but to provide examples in particular in areas where European research, both basic research at university level and applied research, is already strong and where further strengthening would help to maintain or gain a world leading position in these application areas.

1. A short overview of main trends is given below :

  • paradigm change towards peripheral control and ambient intelligence,

  • large collection of 'intelligent devices' surrounding the user and interacting with him,

  • exponential increase of demand for signal processing on the chip both between user and background network (video on demand) and between users (roaming),

  • emphasis on a scaled 'Quality of Service',

  • new importance of security and privacy protection while allowing easy access,

  • emergence of 'personal networks',

  • need for large wireless bandwidth,

  • enormous increase of computational complexity of signal processing algorithms,

  • emerging 'immersive experiences',

  • seamless roaming access,

  • need for support of 'context awareness',

  • renewed importance of energy considerations,

  • augmented reality.

2. Overview of selected potential killer applications :

  • The Personal Information Centre or Wearable Digital Assistant,

  • Surrounding multimedia and videophony,

  • Ubiquitous communications.

3. Overview of important research Issues :

  • Techniques for (broadband) wireless communications,

  • User's access and interfacing,

  • Next generation multimedia as truly immersive,

  • Networking issues,

  • Increase of 'true' intelligence,

  • New types of distributed architectures,

  • New design technology needs.

4. Consequences for future systems on a chip :

  • Networks on a chip techniques will be needed,

  • Real time operating systems to be intensively developed,

  • Combination of heterogeneous signal processing resources,

  • New dynamic and adaptive techniques for task management,

  • Power-speed trade-offs.

Major findings were that Europe should :

  • Take the lead in G4 by putting strong efforts into the open standardisation of its components. Support the implementation of new standards. In a lot of cases reference designs are needed for complex new standards (e.g. MPEG-4, MPEG-7, MPEG-21).

  • Develop an energy-efficient platform for 'intelligent system design', consisting of embedded processors, modules for decision making, modules for pattern recognition, local networking devices and a variety of networking protocols.

  • Start research efforts at higher system levels. Explore aggressively the new possibilities in the multimedia era: new types of transducers, interaction with the Internet, user's control, new services.

  • Start searching in 'body area networking' and place extra emphasis on the development and system integration of devices surrounding the individual.